Initial WLP products manufactured under the FCT UltraCSP license (i.e Amkor, ASE, SPIL, STATSChipPAC, National, etc. )used BCB dielectric, Ti/Al/Ti RDL and Al/NiV/Cu UBM. Larger chips and more difficult reliability requirements have seen a shift to PI and PBO type dielectrics which have higher elongation and are considered “tougher”, a shift to Cu RDL and a shift away from sputtered Al/NiV/Cu UBM.
At the recent IEEE ESTC (Electronic System-integration Technology Conference) in Munich, John Hunt of ASE detailed dielectric, RDL and UBM change options for their WLP technology.
Experiments were run on a 6.36 x 6.36 mm test vehicle having a 15 x 15 array of SAC 405 solder balls on 0.4 mm pitch. The test matrix they examined is shown in Table 1. Cycles to first fail and Weibul 63.2% fail data are shown in Table 2 for the Thermal Cycling and Drop tests.
Hunt concludes that in both the temp cycling and drop test results, cell 8 shows the highest first fail and Weibul 63.2% cycle to failure data. Cell 5 would rank 2nd. Overall both cells have 7.5 um of dielectric in both the first and second RDL layers . Cell 5 uses PI and performs slightly better in the temp cycle tests and cell 8 which uses PBO performs better in the drop test.
All cells with 5 um dielectric performed poorly. Al/NiV/Cu sputtered UBM performed poorly. PBO 2 (lower cure temp – 250 C) performed better in TCT than in drop test. Higher elongation, lower modulus PBO 1 gives better drop test results.
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