The Advanced Packaging Technology Symposium was chaired by
Mike Liang, resident of Amkor Taiwan. The
3DIC Technology Forum and the embedded Technology Forum were chaired by
Chair Ho-Ming Tong, General Manager
& Chief R&D Officer for ASE.
FC and WLP Continue
to Expand
At the Advanced packaging symposium, Vardaman of TechSearch
reported that FC and WLP growth , driven by mobile products, will increase from
15% of the pie in 2012 to 21% of the pie by 2017.
Moving to copper pillar because bump pitch is limited to ~
130um. Cu pillar bump pitch can go to less than 100um. Most are looking at NCP/NCF
underfill solutions.
Corning Updates
Capabilities for Glass Interposers
At the 3DIC technology symposium Shorey of Corning updated
their progress in the area of glass interposers. Working on 100 to 300mm wafers
and 500mm panels (100 – 700um thick) some typical results are shown below.
Looks like current minimums at 20um TSV on 50um pitch with
wafer thicknesses of 100um. Max via densities greater than 250 TSV/mm. Warpage
looks better on glass than on silicon.
Unimicrons look at
Panel Level Technology
At the Embedded Technology Forum Hu of Unimicron looked at
panel level embedded technology. They offer the following comparison of WLP
technology on silicon to “panel level packaging”
(Note: IFTLE does not
agree with the density capability assumptions in either category)
Two processes are evolving for embedded passive panel level
processing as shown in the slide below.
Key Process Items include (a) Component placement accuracy; (b) Interface
Adhesion with Dielectric Layer and (c) Warpage Control.
On interesting concept is the embedding of the SI interposed
into the substrate as shown below. Reportedly less testing steps would be
required and certainly thin wafer handling would be reduced.
GF’s CEO Agit Manocha
on stacked die, 450mm and consolidation
Ed Spurling of Semi Manuf. & Design posted a interesting
interview with GlobalFoundries CEO Agit Manocha. Manocha indicates that GF will
be moving from 20 to 14nm in mid 2014 with a finfet product.
He reports that GF is working with multiple assembly houses
and memory supplier partners to develop 2.5/3D technology which will be
available for 28, 22 and 14nm.
He does not see 450mm being mainstream till 2020.
80% of the worlds IC production is now in moderate to high
risk zones for natural disasters. GF has their production ( New York, Germany
and Singapore) in the 20% low risk zone.
Moving to the 20 and 14 nodes Manocha supports those who
say there will be very few players left. He indicates TSMC, GF, Samsung and
Intel …that’s it …four (4) !
More coverage of Semicon Taiwan is coming in the next few weeks.
For all the latest on 3DIC and advanced packaging stay
linked to IFTLE……………………………………..
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